Increasingly, consumers are demanding portable electronic devices, such as personal digital assistants (PDAs), MP3 players, portable storage systems, advanced wireless telephones, cameras, and other handheld devices. Traditional non-volatile storage mediums, such as hard drives, floppy drives and other storage devices, are generally unsuitable for portable devices. These typical devices generally have moving parts and, as such, are subject to mechanical failure. In addition, such devices are bulky and consume a large amount of energy. As a result, developers are turning to solid-state non-volatile memory devices, such as NAND flash memory, for use in portable products.
Typically, the solid-state non-volatile memory devices organize data in blocks, each block including a set of pages. Often, a block is the smallest unit of memory that may be erased and a page is the smallest unit of memory that may be written. Data may be read from locations within a page.
However, non-volatile solid-state memory devices, and, in particular, NAND flash memory devices, are likely to lose the ability to store data with increasing numbers of read and write operations. To reduce wear among data blocks on a memory device, algorithms are typically employed when writing data to balance usage of the data blocks, for example, by writing to the least used data block. In this manner, block and page usage may be more evenly distributed. In addition, algorithms may be employed to test blocks to determine whether the blocks are functional or corrupted. Poorly functioning blocks may be placed on a list of unusable or bad blocks. Data previously stored on such blocks is typically moved to other usable and functioning blocks.
As a result of the usage balancing and block testing, the physical address of a particular data set may change. To compensate for this change, manufacturers of controllers for such non-volatile solid-state memory devices have developed logical-to-physical address translators. Host devices accessing the solid-state non-volatile memory devices may communicate with the controller using a logical address. The controller translates the logical address into a physical address associated with locations on the non-volatile solid-state memory device. Generally, such translation is performed by software stored on the controller, which accesses a table that is generally stored on the non-volatile solid-state memory device and may be transferred to the controller on demand. In general, such software implementations are slow because of data transfer rates of the table and lengthy logical processes to ascertain a physical address associated with a logical address.
As such, an improved system and method for accessing data stored on a solid-state non-volatile memory device would be desirable.